I am a PhD candidate in Electrical Engineering at Harvard University advised by Prof. Gu-Yeon Wei and Prof. David Brooks in the VLSI-Arch group. My current research interests focus on designing algorithms, energy-efficient and high-performance hardware accelerators and systems for machine learning and natural language processing in particular. I also bear a keen interest in agile SoC design methodologies. My work is supported by the NVIDIA Graduate Fellowship.

Prior to debuting my doctoral studies, I was a staff engineer at Intel in Hillsboro, Oregon, USA where I designed various analog, digital, mixed-signal architectures for high-bandwidth memory and peripheral interfaces on Xeon and Xeon-Phi HPC SoCs. 

Outside of work, I enjoy playing soccer, table tennis, or going on a long hike.